2 Lavoro Computer System Validation Pavia
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Design verification engineer soc Fondazione Chips-IT - Pavia, Italy Qualifications:Master’s degree in Electrical Engineering, Computer Engineering, or a related field.At least 5 years of experience in digital design verification.Strong knowledge of System Verilog and UVM methodology.Hands 18 giorni fa
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SAP ANALYST- SUPPLY CHAIN ACS DOBFAR - Tribiano, Italy participate in team meetings to discuss work progress, share concerns, and address common challenges within the SAP team. Assist in executing computer system validation processes when required, ensuring 4 giorni fa
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